Circuit Design Engineer Resume

Title
Circuit Design Engineer

Primary Skills
Analog/Digital Circuit Design, Hardware Test, HSPICE, IBIS and Verilog A Circuit Modeling

Location
US-AZ-Tempe (will consider relocating)

Posted
Jun-03-09

SESHADRI VENKATARAMANAN Email:Seshadri.Venkataramanan@asu.edu

1205, E Apache Blvd, #121, Tempe, AZ, USA
Phone: (480) 297 6625
EDUCATION
Master of Science in Engineering
GPA - 3.5/4.00
Electronic and Mixed-signal Circuit Design
Graduation Date: May 2009
Arizona State University

Bachelor of Engineering
GPA - 3.7/4.00
Electrical and Electronics
Graduation Date: May 2006
Anna University

WORK EXPERIENCE
Design Engineer Intern (HSPICE and IBIS Circuit Modeling) October 2007 to May 2009
NXP Semiconductors (formerly Philips Semiconductors), Tempe, Arizona
• Developed Perl Script to convert CDL netlists to HSPICE netlists
• Developed and Verified HSPICE and IBIS models for I2C and Analog parts and was in-charge of the IBIS Models.
• Developed Verilog - A models for Analog circuits for system level simulations.
• Developed Encrypted HSPICE models from HSPICE models.
• Verified Analog and High Speed Digital Circuits.

Applications and Test Engineer
June 2006 to July 2007
Teradyne - India Design Center, HCL Technologies, Chennai, India
Job Description:
• Was actively involved in Product Functional Verification of DI-750, an LCD Tester developed by Teradyne and was recognized for developing extensive test plans.
• Worked on the development and testing of "Catalyst to Ultra-Flex Converter" tool in PERL to convert test programs in IMAGE platform to FLEX platform.
• Delivered Lectures on Applications and Hardware Engineering - FLEX Tester and IGXL Software which was received well by managers and engineers working on the software division.
• Attended a two month training program on fundamentals of Mixed Signal testing and test program development for mixed signal devices on FLEX platform at Teradyne, Shanghai and Developed Test Programs for digital device 8243 I/O expander and mixed signal device AC01, as part of training projects.
COURSEWORK
• Analog Integrated Circuits, Advanced Analog Integrated Circuits, Digital Circuits, VLSI Design, Power Electronics
• Fundamentals of Solid State Devices, Feedback Systems, Computer Architecture, Microprocessors
• Over sampled Sigma Delta Data converters, Nyquist rate Analog to Digital Converters
• VLSI High Speed I/O circuits, Communication Transceiver Circuit Design

GRADUATE PROJECTS
• Developed Matlab Model of a 1.5 bit per stage RSD Pipeline Analog to Digital Converters and characterization of ADCs.
• Designed an 80MHz, 10-bit fully differential RSD-based pipelined ADC in Cadence.
• Designed a Common Source Cascode LNA with inductor degeneration for GSM900 Receiver.
• Designed a fully differential Gilbert-cell mixer for Direct Conversion GSM900 Receiver.
• Designed a GSM900 Direct Conversion Receiver in TSMC 0.35um technology conforming to GSM standards.
• Designed a 4 phase, 1.6GHz Phase Locked Loop for Data Recovery Circuit Applications.
• Designed a 70dB, 200 KHz, fully differential second order continuous-time sigma delta modulator.
• Designed a High Gain 50? Class AB Output Driver Amplifier for Folded Cascode Amplifier.
• Designed a Folded Cascode Differential Transconductance Amplifier.
• Design and laid out a Telescopic Cascode Differential Transconductance Amplifier.
• Design of 32 X 32 Register File with two read ports and one write port.

SKILLS
EDA Tools/Packages : Cadence (Spectre, Virtuoso Layout Editor), Agilent ADS, Orcad PSpice, Matlab with Simulink, HSPICE, and IBIS Toolkit,
Languages : C, C++, VHDL, Verilog, Assembly x86
Scripting Languages : PERL and Visual Basic
Operating systems : MS Windows, Linux, Solaris and Mac OS X.


REFERENCES AVAILABLE ON REQUEST

Certifications
See above


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