ASIC/FPGA Design /verification engineer Resume

Title

ASIC/FPGA Design /verification engineer

Primary Skills

ASIC design and verification, ,Expertise in FPGA/ASIC/VLSI design flow, VHDL, Verilog

Location
Canada-ON-Toronto

Posted
Apr-14-12

RESUME DETAILS

Career Objectives

To be an integral part of a respected and professional organization, where I can exploit myself in the field of
FPGA, VLSI and ASIC and to keep myself updated with the cutting edge technologies.

Education
• MASc in Electrical and Computer Engineering
Waterloo, ON
University of Waterloo
January 2010 - Till date
-- Thesis Title: ASIC implementation of Welch Gong (WG) stream cipher for RFID (Radio Frequency
Identification) tags Master of Engineering in

•Microelectronics Bangalore, India
Indian Institute of Science
August 2005 - August 2007
-- Thesis Title: Implementation of Elliptic Curve Cryptography on FPGA

Work Experience
• Member Technical Staff
KPIT Cummins Infosystems Ltd.
-- ASIC Design and Verification
Bangalore, India
July 2007 - November 2009

Expertise
• Two years industry work Experience in ASIC verification, writing test cases and running regressions.
• Expertise in FPGA/ASIC/VLSI design flow, functional simulation, synthesis, static timing analysis, place and route.
• Skilled in VHDL, Verilog, SystemC and C/C++ fundamentals.
• FPGA Architecture and design tools: Stratix, CycloneII and Spartan, Altera QuartusII, Xilinx Foundation
Series (ISE)
• ASIC design tool: Cadence.
• Simulation tools: LTspice, ModelSim, Tanner VLSI Tools, VIS (Formal Verification Tool), NC-Sim,
MATLAB, Maple15.
• Scripts: Perl and Python
• In-depth working knowledge of Cryptography systems, Symmetric-key and Public-key cryptosystems,
Stream and Block ciphers architectures.
• Experience in RFID technology, RFID tags/readers and RFID authentication and mutual authentication
protocols.
• Excellent troubleshooting and debugging skills
Research and Work Experience
• Master Thesis Research
Waterloo, ON
University of Waterloo
January 2010 - Till date
-- Project description: RFID technology has become an integral part of our daily life and it is widely
used in many real-life applications such as proximity cards, hospitals, supply chain management etc.
The major concern in RFID tags are security and privacy because it carries identification information
that can be tracked or monitored by unauthorized persons. To overcome these concerns, cryptography
systems are introduced in RFID tags. However, RFID tags require more stringent computations and
storage capabilities to keep the cost of the tags less. The aim of our project is to implement an
optimized stream cipher in terms of less gate count and low power.
-- Contributions: The design, implementation and functional verification of stream cipher were carried
out using VHDL. Additionally, design synthesis, place and route and timing analysis has been
performed for various CMOS VLSI technologies such as 65 nm, 90 nm and 130 nm.
Teaching Assistant
Waterloo, ON
University of Waterloo
January 2010 - Till date
1. ECE 124 (Digital Circuits and Systems(VHDL)): Helped Ist year undergraduate students in
there project design and implementation of controlling an elevator using combinational circuits on
Altera FPGA-CycloneII series. Other responsibilities like giving assignment tutorials on sequential
and combinational circuits.
2. ECE 222 (Computer Organization): Contributed to IInd year undergraduate students for there
projects related to digital calculator and digital clock implementations using MC 68K processor
instruction set. Conducting project demo exams, giving assignment tutorials on pipelining, internal
architecture of the processor and its control unit concepts.

• Member Technical Staff
Bangalore, India
KPIT Cummins Infosystems Ltd.
July 2007 - November 2009

-- Client: Fujitsu Microelectronics, Germany
-- VLSI verification: Worked on Fujitsu 16FX verification environment and developed new test cases
for newly added design modules from scratch at system and module levels.

PROJECTS I & II Fujitsu 16-Bit MCU chip design (MB96F918D & MB96F355R)
-- Description: Each chip consists of 16-Bit Fujitsu micro controller and a core processor with multiple
peripherals like Lin-Uart, Flash memory, Data-Flash, ADC, PPG etc. The chip is specifically designed
for automotive applications.
-- Contributions:
• Verified the design in RTL and gate level simulations.
• Run RTL, Pre-Netlist and post-Netlist simulations.
• Verified and debugged test cases related to Data-Flash, UART, PPG, RLT modules.
-- Environment: Cadence NC Simulator (Verilog and SystemC)

PROJECT III Verification of UART & CSIO modules for Multi Function Serial (MFS)
Interface
-- Description: The interface mode in MFS can assign 3-bit settings in its mode control register to act
as UART0 (Asynchronous Serial Interface), UART1 (Asynchronous Multi processor Serial Interface),
CSIO (Clock Synchronization Interface Mode) and I2C (bus Interface). CSIO is a general purpose
interface for serial data communication which allows synchronous communications with external
modules.
-- Contributions:
• Verified the interface for serial data communication with transmission and reception.
• Developed test cases.
-- Environment: Cadence NC Simulator (Verilog and SystemC)

PROJECT IV Development of BFM for AHB and AMBA protocols
-- Description: The AMBA AHB is a widely preferred bus for System On Chip (SoC) applications and
complex chip architectures.
-- Contributions:
• Developed a BFM model for AHB and AMBA protocol.
• Verified the complexity by increasing the number of Masters and Slaves on the AHB Bus.
-- Environment: Verilog.

• Master of Engineering in Microelectronics
Bangalore, India
Indian Institute of Science.
August 2005 - August 2007

-- Thesis title: Implementation of Elliptic Curve Cryptography on FPGA
-- Description: Public key cryptosystems are used in distributing shared secret information. For
security reasons, key sizes of cryptosystems are in the range of hundreds of bits. Elliptic curve
cryptography is evolving as an attractive alternative to other public-key schemes such as RSA by
offering the smallest key size. Another advantage that makes elliptic curves more attractive is the
possibility of optimizing the arithmetic operations in the underlying field. The aim of our project is to
implement the Elliptic Curve Arithmetic over finite fields in hardware.
-- Contribution: System design, I/O assignment & analysis, synthesis, place & route and verification
for different field widths of ECC IP. Prototype is implemented on ALTERAs Stratix series of FPGA
technology. With this implementation of an arithmetic logic unit for finite fields it is possible to
compute the scalar multiplication faster than other hardware implementations.
-- Environment: ALTERAs Quartus II.

-- Project I: Design of 8-Bit Multiple Accumulator

-- Contribution: Designed an 8-bit Multiple Accumulator (MAC) running at the speed of 2.5 GHz and
with the power utilization of 25.123 mW, using 180 nm technology.
-- Environment: Tanner VLSI tool, Electric Editor, LT Spice.

-- Project II: CMOS Temperature Sensor

-- Contribution: A CMOS temperature sensor working over a range of −50 ◦ C to 125 ◦ C was designed
using chopper amplifier for offset cancellation and the accuracy achieved was 2.72 ◦ C at a conversion
rate of 30 samples /sec.
-- Environment: Tanner VLSI tools.

Publications and Achievements

• Hardware implementation of WG-5 Stream cipher for RFID tag authentication protocol (Manuscript under
preparation).
• Secured 98.42 percentile in India's most competitive exam GATE (Graduate Aptitude Test in
Engineering)- 2005.

Awards

• International Doctoral Student Awards, University of Waterloo, CAD$ 3285, Jan-April 2012,
Jan-Dec 2011, Jan-Dec 2010.
• Graduate Research Studentship Awards, University of Waterloo, CAD$ 6333, Jan-April 2012,
Jan-Dec 2011, Jan-Dec 2010.

Courses studied during Masters
At University of Waterloo, Waterloo, Canada
Computer Network security, Topics of communication and information theory, Advanced topics in cryptography,
security and privacy and Selected Topics in Cryptographic Computations

At Indian Institute of Science, Bangalore, India
Designing of PLDs and FPGAs, Digital VLSI, Embedded System, Analog VLSI, VLSI Device and Process
Simulation, Testing and Verification Methodologies for SoC Design, Electromagnetic Compatibility, Submicron
Device Physics, Communication Protocols, Microwave Engineering & RF MEMS.

Certifications

See above

CONTACT DETAILS

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