Product Manager Resume

Title

Product Manager

Primary Skills

Experience in software product development, hardware design, system engineering and Agile practices

Location
US-CA-San Francisco

Posted
Jul-15-12

RESUME DETAILS

PRODUCT MANAGEMENT

Strong Leadership / Cloud Computing / Metrics and Analytics
Product Positioning and Marketing / Release Planning / Requirements Gathering

Highly motivated Product Manager with extensive experience in software product development, hardware design, system engineering and Agile practices including Scrum Master Certification. A proven track record in leading cross-functional teams, promoting products and interacting with customers.

Passionate team leader that consistently drives the development of products from creation to successful delivery. Effectively manages programs within targeted budgets and schedules. Demonstrated ability to gather requirements through collaboration with stakeholders. Excellent interpersonal communication, conflict resolution and decision making skills.

Technical and Management Strengths:
. Analytical Thinking/Problem Solving
. Broad Range of Technical Competencies
. Cost Analysis and Reporting
. Effective Communication
. Risk and Opportunity Management
. MRDs/PRDs

PROFESSIONAL EXPERIENCE

RAYTHEON/APPLIED SIGNAL TECHNOLOGY 4/2005 - present
Product/Section Manager/System Engineer

Product Manager: Selected to establish and manage web based software visualization products within the Broadband Communications Systems (BCS) Division. Doubled size in both contracts and staff of two products within the first two years.

Earned six consecutive 100% contract award fees while managing the teams. Product management responsibilities include maintaining product roadmaps and release schedules and ensuring that contract deliverables are met; establishing requirements through collaboration with engineering and end users; participating in customer reviews communicating status, risks and presenting costs for product enhancements; and coordinating training sessions conducted at customer facilities at the conclusion of product releases.

Expanded products into international markets while working with BCS business development. Other responsibilities include interacting with cross-functional teams in acquiring resources needed for the development and test of the SW products.

Managed and led company IR&D programs and proposal efforts. Section manager with responsibilities that include participating in the annual Focal Review Process by preparing and holding reviews for staff and facilitating professional development of the staff.

Cost Account Manager (CAM): Performed CAM functions for multiple FPGA, SW and HW components with budgets of $2-$4M. Supported schedule planning efforts, held weekly meetings for four teams of five to seven developers, reported team status to management, and coordinated component hand-offs to I&T.

Senior System Engineer: Wrote the Signal Processing Sub-element hardware specification that defined the data, control, timing and power plane architectures. The spec also defined testability and maintainability requirements and documented CONOPs for system operation; wrote and maintained the hardware ICDs for a large program. Participated in the flow down and maintenance of requirements from element to sub-element components. Other activities included reviewing the prime contractor schematics and ICDs to verify compliance with ICDs and firmware developed by AST.

CIENA COPRORATION 7/2001 - 3/2005
HW Engineering Lead- CDXL Control and Timing Shelf

Technical lead of the Control and Timing Shelf (CTS) of the Core Director XL (CDXL), a multi-bay non-blocking multi-service switch with an aggregate bandwidth of 3.82 Tbps. The CTS contained five unique modules. Responsibilities included attendance at all CDXL HW and SW system design reviews, coordination of system specifications across a CTS team of thirty HW, SW, mechanical, FPGA, verification, test, power and PCB designers.

Lead designer of the Switch Control Module that detected and corrected for network topology changes using protection schemes and provided configuration settings for the CDXL switch fabric. Five Virtex FPGAs, an MPC7451 based processor complex with two PCI interfaces, ten Giga-bit optical interfaces, two Giga-bit Ethernet SerDes interfaces and JTAG.

Selected Achievements
. Participated in the successful demonstration of switching capabilities for CDXL. This included the verification of major shelf interfaces and demonstrating control of the switch fabric

RADIX TECHNOLOGIES 5/1996 - 7/2001
Engineering Manager/Senior Design Engineer

Engineering Manager Defined staff work assignments, wrote employee reviews, coordinated staff training and career development, conducted section efficiency assessments and participated in architecture reviews for new programs.Technical Lead - Senior Design Engineer Technical lead of a Digital Receiver Processor (DRxP) chassis for a Department of Defense application. Chassis interfaces included: RACEway, VME, Fibre Channel (FC) and Low Voltage Differential Signaling (LVDS). Served as the liaison between Radix Technologies and the prime contractor for the DRxP chassis development. Principle designer of a Wideband Digital Receiver circuit board. This board included five Altera FPGAs and three Motorola processors. VME, RACEway and FC interfaces. System integration and test of the multi-chassis system (six digital chassis). Also designed a low power Tactical Receive Only Radio and two circuit cards for a GPS anti-jam receiver. Selected Achievements. Successfully defined and communicated the common interfaces and technologies used in the DRxP chassis while acting as the liaison between Radix Technologies and the prime contractor. . Helped resolve many interface issues during board/chassis I&T and communicated solutions across the team

TECHNICAL COMPETENCIES
. Full lifecycle development
. Agile development and Cloud computing
. Microsoft Word/Excel/Project/Visio
. Strong telecommunications background
. Xilinx ISE Foundation, Altera Quartus, Cadence Schematic and PCB
. VHDL, Mentor Graphics Renoir, ModelSim and Leonardo VHDL development tools
. Familiarity with Perl/MySQL/Java/FLEX/C++/Matlab/Linux

EDUCATION / CERTIFICATIONS/ PROFESSIONAL AFFILIATIONS
. M.S. in Electrical Engineering University of Illinois Urbana, Champaign
. B.S. in Electrical Engineering (Honors) University of Illinois Urbana, Champaign
. Certificate: Program/Systems Management
. Member of Scrum Alliance, San Francisco Agile Users Group, Project Managers SIG Silicon Valley
. Tau Beta Pi

Certifications

See above

CONTACT DETAILS

You must be logged in and have a current resume access subscription. Login or Register »